Dual cost function model predictive direct speed control with duty ratio optimization for PMSM drives
- Liu, Ming, Hu, Jiefeng, Chan, Ka, Or, Siu, Ho, Siu, Xu, Wenzheng, Zhang, Xian
- Authors: Liu, Ming , Hu, Jiefeng , Chan, Ka , Or, Siu , Ho, Siu , Xu, Wenzheng , Zhang, Xian
- Date: 2020
- Type: Text , Journal article
- Relation: IEEE Access Vol. 8, no. (2020), p. 126637-126647
- Full Text:
- Reviewed:
- Description: Traditional speed control of permanent magnet synchronous motors (PMSMs) includes a cascaded speed loop with proportional-integral (PI) regulators. The output of this outer speed loop, i.e. electromagnetic torque reference, is in turn fed to either the inner current controller or the direct torque controller. This cascaded control structure leads to relatively slow dynamic response, and more importantly, larger speed ripples. This paper presents a new dual cost function model predictive direct speed control (DCF-MPDSC) with duty ratio optimization for PMSM drives. By employing accurate system status prediction, optimized duty ratios between one zero voltage vector and one active voltage vector are firstly deduced based on the deadbeat criterion. Then, two separate cost functions are formulated sequentially to refine the combinations of voltage vectors, which provide two-degree-of-freedom control capability. Specifically, the first cost function results in better dynamic response, while the second one contributes to speed ripple reduction and steady-state offset elimination. The proposed control strategy has been validated by both Simulink simulation and hardware-in-the-loop (HIL) experiment. Compared to existing control methods, the proposed DCF-MPDSC can reach the speed reference rapidly with very small speed ripple and offset. © 2013 IEEE.
- Description: This work was supported in part by the Research Grants Council of the Hong Kong Special Administrative Region (HKSAR) Government under Grant R5020-18, and in part by the Innovation and Technology Commission of the HKSAR Government to the Hong Kong Branch of National Rail Transit Electrification and Automation Engineering Technology Research Center under Grant K-BBY1.
- Authors: Liu, Ming , Hu, Jiefeng , Chan, Ka , Or, Siu , Ho, Siu , Xu, Wenzheng , Zhang, Xian
- Date: 2020
- Type: Text , Journal article
- Relation: IEEE Access Vol. 8, no. (2020), p. 126637-126647
- Full Text:
- Reviewed:
- Description: Traditional speed control of permanent magnet synchronous motors (PMSMs) includes a cascaded speed loop with proportional-integral (PI) regulators. The output of this outer speed loop, i.e. electromagnetic torque reference, is in turn fed to either the inner current controller or the direct torque controller. This cascaded control structure leads to relatively slow dynamic response, and more importantly, larger speed ripples. This paper presents a new dual cost function model predictive direct speed control (DCF-MPDSC) with duty ratio optimization for PMSM drives. By employing accurate system status prediction, optimized duty ratios between one zero voltage vector and one active voltage vector are firstly deduced based on the deadbeat criterion. Then, two separate cost functions are formulated sequentially to refine the combinations of voltage vectors, which provide two-degree-of-freedom control capability. Specifically, the first cost function results in better dynamic response, while the second one contributes to speed ripple reduction and steady-state offset elimination. The proposed control strategy has been validated by both Simulink simulation and hardware-in-the-loop (HIL) experiment. Compared to existing control methods, the proposed DCF-MPDSC can reach the speed reference rapidly with very small speed ripple and offset. © 2013 IEEE.
- Description: This work was supported in part by the Research Grants Council of the Hong Kong Special Administrative Region (HKSAR) Government under Grant R5020-18, and in part by the Innovation and Technology Commission of the HKSAR Government to the Hong Kong Branch of National Rail Transit Electrification and Automation Engineering Technology Research Center under Grant K-BBY1.
An adaptive fault ride-through scheme for grid-forming inverters under asymmetrical grid faults
- Li, Zilin, Chan, Ka, Hu, Jiefeng, Or, Siu
- Authors: Li, Zilin , Chan, Ka , Hu, Jiefeng , Or, Siu
- Date: 2022
- Type: Text , Journal article
- Relation: IEEE Transactions on Industrial Electronics Vol. 69, no. 12 (2022), p. 12912-12923
- Full Text:
- Reviewed:
- Description: Three-phase four-wire grid-forming (GFM) inverters are promising to interface distributed energy resources into low-voltage networks. However, these inverters are prone to overcurrent under grid faults. Physically increasing the inverter current capacity is not cost-effective to cope with complicated fault conditions. In this article, an adaptive fault ride-through (FRT) scheme based on instantaneous saturators and virtual negative- and zero-sequence resistances is proposed. It features not only overcurrent limitation by modifying voltage references, but also seamless transition between normal and grid fault conditions. The proposed FRT scheme is first analyzed from different aspects, including the virtual sequence resistances, grid short-circuit ratio, fault types, and fault levels. The virtual sequence resistances are then designed to be adaptive to ensure high voltage quality at the healthy phase. The proposed FRT scheme is verified by MATLAB/Simulink simulations under asymmetrical faults. A laboratory platform with a grid-connected 3kW GFM inverter is further constructed to demonstrate its effectiveness (a video of the experimental results under three asymmetrical faults is attached). © 1982-2012 IEEE.
- Authors: Li, Zilin , Chan, Ka , Hu, Jiefeng , Or, Siu
- Date: 2022
- Type: Text , Journal article
- Relation: IEEE Transactions on Industrial Electronics Vol. 69, no. 12 (2022), p. 12912-12923
- Full Text:
- Reviewed:
- Description: Three-phase four-wire grid-forming (GFM) inverters are promising to interface distributed energy resources into low-voltage networks. However, these inverters are prone to overcurrent under grid faults. Physically increasing the inverter current capacity is not cost-effective to cope with complicated fault conditions. In this article, an adaptive fault ride-through (FRT) scheme based on instantaneous saturators and virtual negative- and zero-sequence resistances is proposed. It features not only overcurrent limitation by modifying voltage references, but also seamless transition between normal and grid fault conditions. The proposed FRT scheme is first analyzed from different aspects, including the virtual sequence resistances, grid short-circuit ratio, fault types, and fault levels. The virtual sequence resistances are then designed to be adaptive to ensure high voltage quality at the healthy phase. The proposed FRT scheme is verified by MATLAB/Simulink simulations under asymmetrical faults. A laboratory platform with a grid-connected 3kW GFM inverter is further constructed to demonstrate its effectiveness (a video of the experimental results under three asymmetrical faults is attached). © 1982-2012 IEEE.
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